AP Memory - Silicon Capacitor Supply Crunch
Inside the high-density, ultra-thin stacked silicon capacitors supplying chips.
Disclosure: Not financial advice. Do your own research.
The rise of AI and high-performance computing has created a significant crunch in the supply chain because next generation chips have higher performance, which often results in increased power consumption and voltage instability.
The solution to voltage instability is a capacitor, which stores electrical energy temporarily.
However, a silicon capacitor is a specialized energy storage device built on a silicon wafer substrate that addresses these needs by providing high capacitance density in an extremely low profile, often less than 100µm thin. These components are designed to be integrated directly with a SoC using advanced packaging processes, allowing them to be placed much closer to the processor to ensure voltage stability during high-frequency operations.
This may confuse you with MLCC, which is a multi-layer ceramic capacitor.
These are bulkier, more discrete and may struggle with voltage instability. As shown by SEMCO, silicon capacitors have low capacitance change rate compared to MLCCs, which allows for the capacitor to operate more efficiently in environments of stress, such as temperature fluctuations.
There are typically three ways of mounting silicon capacitors:
Land-side silicon capacitors: Mounted on the bottom of the silicon interposer
Top-side silicon capacitors: Mounted on the side of the GPU, CPU, or ASIC.
Embedded silicon capacitors: Embedded inside the package substrate.
There is ONE other way, and that is called embedded silicon capacitor with TSV (through silicon via) in the build-up layer.
Why would the silicon capacitor use TSV? This significantly improves routing efficiency, eliminating the need for additional power rails or split cavities.
AP Memory’s specific technology, S-SiCap (Stacked Silicon Capacitor), advances this concept by utilizing a stacked capacitor architecture rather than the deep trench designs commonly used in the industry.
According to the sources, this stacked design offers several key advantages:
Better Density: The latest S-SiCap Gen4 achieves a capacitance density of 3.8 μF/mm², which is more than a 50% increase over the previous generation.
Enhanced Stability: It features low equivalent series inductance (ESL) and low equivalent series resistance (ESR), providing the robust power integrity required for AI servers.
Design Versatility: The S-SiCap portfolio is split into two main categories: Discrete Silicon Capacitors (IPD), which can be embedded directly into a package substrate, and Silicon Interposers (IPC), which embed high-density capacitors within the interposer to improve signal integrity for HBM and die-to-die connectivity.
When you look at this, it is different than the methodology used by SEMCO, where the capacitor would be either on the top, bottom, or embedded. AP Memory is changing it up by directly embedding the silicon capacitor into the interposer.
The decision to integrate high-density capacitors directly into the silicon interposer, is driven by the extreme performance requirements of next-generation AI and high-performance computing systems.
The primary reason for placing capacitors in the interposer is to solve the problem of voltage instability during high-frequency operations. In advanced AI servers, processors consume massive amounts of power and require a very steady voltage supply; however, traditional capacitors are often placed too far from the processor die to effectively mitigate electrical noise. By embedding the capacitor directly within the silicon interposer, the capacitor is positioned as close to the SoC as physically possible, ensuring strong power integrity and supporting high-speed signal transmission.
The other type is IPD in substrate. IPD is an independent discrete silicon capacitor component that can be embedded into HPC packaging substrates or other locations, serving as a passive component to provide capacitance functionality.
The application for this is primarily applied in TSMC's CoWoS-L packaging technology, and can extend to CoWoS-L/S variants, used for power management and signal stabilization in advanced packaging.
The advantages of IPD are high flexibility, applicable within substrates or under packages, providing additional capacitance density, supporting multi-layer stacking and edge AI applications.
IPD is expected to enter mass production by Q2’26 as seen above.
The market for silicon capacitors is mostly concentrated. Most of the market is in Asia Pacific, 46.93% market share.
The top 3 players for Si-Cap are:
Samsung Electro-Mechanics (SEMCO)
Murata
AP Memory
Among these three, doing a brief comparison of their capacitors makes sense.
This data was derived from the specs sheet online from their websites. Unfortunately, AP Memory did not have a spec sheet available, so I used the available information to create this table.
AP Memory stands out as the specialist in space efficiency. Think of their technology, S-SiCap, like a luxury high-rise apartment building. They use a “stacked” design to pack a massive amount of energy storage into a tiny footprint. Their latest generation can hold 3.8 microfarads of energy per square millimeter, which is the highest density among the three. This makes them ideal for AI chips where space is extremely tight, but power needs are huge. They keep everything consistently thin, less than the thickness of a human hair, so they can be tucked directly inside the chip’s packaging.
Murata, on the other hand, is the expert in extreme thinness and durability. While AP Memory focuses on packing in the most energy, Murata focuses on making their capacitors as flat as possible, reaching 85 microns and below. Furthermore, their products are built to handle voltage. While AP Memory and SEMCO focus on the low-voltage needs of AI processors (around 1.2 volts), Murata’s capacitors can handle 4.5 volts, making them the heavy-duty choice for systems that need more electrical muscle in a very slim profile.
SEMCO (Samsung Electro-Mechanics) is the “speed king” of the group, focusing on reaction time. In technical terms, they have the lowest ESL (inductance), measured at 2 pico-Henries or less. To put that simply, “inductance” is like electrical lag…the lower it is, the faster the capacitor can deliver power to the chip the instant it’s needed.
In conclusion, while all three companies are helping fuel the AI revolution, they offer different tools for the job. AP Memory is the best at packing power into the smallest area, Murata is the go-to for the thinnest and highest-voltage designs, and SEMCO provides the fastest electrical response and the widest range of product sizes.
All 3, whichever way you rank them, are in high demand and needed.
The demand for Si-Cap as said above is increasing, and proof of this is in a recent announcement by SEMCO on doing a supply contract with a global-large scale company in North America for their silicon capacitors.
SEMCO had previously done a deal with Marvell in 2025 to supply them silicon capacitors.
This is the proof of demand that leans into the success story for AP Memory.
AP memory has cited increased demand for their S-SiCap in advanced packaging this year and next year, and is reportedly working with Intel to supply IPD for their EMIB technology.
According to their recent Q1’26 financial reporting, S-SiCap revenue has gone from NT$66M to NT$572M over 1 year, that is an increase of +766%.
The increase in their revenue is essentially parabolic!
This company has generated most of its revenue from IoTRAM, which is characterized by low power consumption, high performance, and small die/package size, making them suitable for small form factor and battery-powered applications such as IoT, wearables, and display devices.
However, the revenue concentration coming from one segment is slowly decreasing. In Q1’25, ~92% of their revenue came from IoTRAM compared to 70% in Q1’26.
This number is decreasing and is expected to decrease, as said in the news report:
“AP Memory has set a long term goal of having a more balanced revenue breakdown with each product to make up one-third of its revenue, it said.”
They are also expected to increase capacity to fulfill the rise in demand:
“AP Memory is seeking extra capacity from a second foundry service provider, after Powerchip Semiconductor Manufacturing Corp sold its 12-inch fab to Micron Technology Inc earlier this year. The company is in initial discussions with new foundry companies, it said.”
Worth noting, an US brokerage issued a positive outlook on AP memory:
“US brokerage firms stated that SEMCO has always been a participant in the Si-Cap market, and Winbond may be its wafer foundry partner. Nevertheless, according to the brokerage's supply-demand model, the non-TSMC silicon capacitor market supply is expected to remain in shortage for the next three years. Moreover, time is still needed from equipment introduction to customer qualification. In addition, AP Memory also indicated during its earnings call that more and more clients are joining. Therefore, the brokerage believes the market is overly concerned about competition in the early stage of the industry. It reaffirms its positive rating on AP Memory and maintains the target price unchanged.”
This is an interesting company that is centered around benefitting from a silicon capacitor bottleneck, that is expected to remain tight for about 3 years.
The share price has ran up 110% YTD, but is down 15% from its ATH.
